Andes Technologies Unveils New High-Performance AX65 RISC-V Processor

Andes Technologies Unveils New High-Performance AX65 RISC-V Processor

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Andes Technologies, a key player in the open-source instruction set architecture (ISA) movement, has recently announced the release of its highly anticipated AX65 RISC-V-compliant CPU IP. This 64-bit multicore processor is designed to cater to the needs of various application processor sockets in the computing, networking, and high-end controller industries. The AX65 is compliant with the RISC-V RVA22 profile and incorporates support for RISC-V standard “G” extensions. Furthermore, this processor utilizes Andes Technologies’ AndeStar V5 architecture, which is known for its exceptional performance.

The AX65 features a 13-stage superscalar out-of-order processor with the capacity to support up to eight cores with cache coherence. This is made possible thanks to the extensive branch prediction features of the CPU core, which are based on the Tagged Geometric Length algorithm. This enables enhanced branch prediction accuracy, resulting in improved overall performance.

In terms of memory, the AX65 offers up to 64 kB of Level-1 instruction and data cache, as well as up to 8 MB of Level-2 unified cache. With a dedicated cache coherence manager, it ensures efficient communication between L1 and L2 cache across all eight cores. Additionally, the device includes a platform-level interrupt controller that supports up to 1,023 interrupt sources, further enhancing its versatility.

The AX65 not only boasts impressive features but also delivers outstanding performance. With speeds of up to 2.0 GHz and an efficiency score of 9.25 CoreMark/MHz, this processor sets new standards. Andes Technologies claims that the AX65 achieves a SPECint2006 score of 8.25 per GHz, marking a remarkable 100% improvement compared to their AX45 family.

One key aspect that sets the AX65 apart is its utilization of the out-of-order pipeline architecture. Unlike traditional in-order pipelines, the out-of-order pipeline allows instructions to be executed in a sequence that differs from their original order. This significantly reduces idle time and enables simultaneous processing of multiple instructions, resulting in higher instruction throughput and overall performance.

With the release of the AX65, Andes Technologies aims to make a substantial impact in the computing industry. The processor’s impressive CoreMark and SPECint2006 scores make it an attractive choice for high-performance applications like Advanced Driver Assistance Systems (ADAS) and networking. It represents a new era of high-performance processing power that will undoubtedly shape the future of computing.

The source of the article is from the blog foodnext.nl

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